The present invention relates to a phase-adjusting circuit for adjusting the phase difference between signals that are supplied through different transmission lines.
A parallel transmission system for distributing signals to a plurality of transmission lines improves the reliability of communications. In this system, delays differ from one transmission line to another so that it is necessary to provide a phase-adjusting circuit on the reception side in order to adjust for delays or phase difference.
One example of a conventional phase-adjusting circuit is described in Japanese Patent Publication No. 61-24852 (24852/86) by Nishiwaki. The Nishiwaki's circuit comprises memories each being associated with an input line and read and write control circuits, and wherein phase adjustment is performed, by independently writing input data into each memory and orderly reading data from each memory under control of the write and read control circuits. Such a conventional phase-adjusting circuit, however, requires memories and read and write control circuits for each input line resulting in a drawback that the circuit scale tends to become large. In addition, there is also a drawback in that the writing and reading operations of the memories have to be controlled separately, resulting in complicated operations.